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雙極性晶體管

二極管

ESD保護(hù)、TVS、濾波和信號(hào)調(diào)節(jié)ESD保護(hù)

MOSFET

氮化鎵場(chǎng)效應(yīng)晶體管(GaN FET)

絕緣柵雙極晶體管(IGBTs)

模擬和邏輯IC

汽車(chē)應(yīng)用認(rèn)證產(chǎn)品(AEC-Q100/Q101)

NPIC6C596BQ-Q100

Power logic 8-bit shift register; open-drain outputs

The NPIC6C596-Q100 is an 8-bit serial-in/serial or parallel-out shift register with a storage register and open-drain outputs. Both the shift and storage register have separate clocks. The device features a serial input (DS) and a serial output (Q7S) to enable cascading and an asynchronous reset MR input. A LOW on MR resets both the shift register and storage register. Data is shifted on the LOW-to-HIGH transitions of the SHCP input. The data in the shift register is transferred to the storage register on a LOW-to-HIGH transition of the STCP input. If both clocks are connected together, the shift register is always one clock pulse ahead of the storage register. To provide additional hold time in cascaded applications, the serial output QS7 is clocked out on the falling edge of SHCP. Data in the storage register drives the gate of the output extended-drain NMOS (EDNMOS) transistor whenever the output enable input (OE) is LOW. A HIGH on OE causes the outputs to assume a high-impedance OFF-state. Operation of the OE input does not affect the state of the registers.

The open-drain outputs are 33 V/100 mA continuous current extended-drain NMOS transistors designed for use in systems that require moderate load power such as LEDs. Integrated voltage clamps in the outputs provide protection against inductive transients making the device suitable for power driver applications such as relays, solenoids and other low-current or medium-voltage loads.

This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.

此產(chǎn)品已停產(chǎn)

Features and benefits

  • Automotive product qualification in accordance with AEC-Q100 (Grade 1)

    • Specified from -40 °C to +125 °C

  • Low RDSon

  • Eight Power EDNMOS transistor outputs of 100 mA continuous current

  • 250 mA current limit capability

  • Output clamping voltage 33 V

  • 30 mJ avalanche energy capability

  • Enhanced cascading for multiple stages

  • All registers cleared with single input

  • Low power consumption

  • ESD protection:

    • HBM AEC-Q100-002 revision D exceeds 2500 V

    • CDM AEC-Q100-011 revision B exceeds 1000 V

  • DHVQFN package with Side-Wettable Flanks enabling Automatic Optical Inspection (AOI) of solder joints

Applications

  • LED sign

  • Graphic status panel

  • Fault status indicator

參數(shù)類(lèi)型

型號(hào) Package name
NPIC6C596BQ-Q100 DHVQFN16

封裝

下表中的所有產(chǎn)品型號(hào)均已停產(chǎn) 。

型號(hào) 可訂購(gòu)的器件編號(hào),(訂購(gòu)碼(12NC)) 狀態(tài) 標(biāo)示 封裝 外形圖 回流焊/波峰焊 包裝
NPIC6C596BQ-Q100 NPIC6C596BQ-Q100,1
(935298528115)
Withdrawn / End-of-life SOT763-1
DHVQFN16
(SOT763-1)
SOT763-1 SOT763-1_115

環(huán)境信息

下表中的所有產(chǎn)品型號(hào)均已停產(chǎn) 。

型號(hào) 可訂購(gòu)的器件編號(hào) 化學(xué)成分 RoHS RHF指示符
NPIC6C596BQ-Q100 NPIC6C596BQ-Q100,1 NPIC6C596BQ-Q100 rohs rhf rhf
品質(zhì)及可靠性免責(zé)聲明

文檔 (10)

文件名稱(chēng) 標(biāo)題 類(lèi)型 日期
NPIC6C596_Q100 Power logic 8-bit shift register; open-drain outputs Data sheet 2020-06-22
AN11537 Pin FMEA for NPIC Family Application note 2019-10-07
AN90063 Questions about package outline drawings Application note 2025-03-12
SOT763-1 3D model for products with SOT763-1 package Design support 2019-10-03
npic6c596 NPIC6C596 IBIS model IBIS model 2016-05-30
Nexperia_document_leaflet_Logic_NPIC_ShiftRegisters_201906 NPIC Logic Shift Registers Leaflet 2019-07-12
Nexperia_package_poster Nexperia package poster Leaflet 2020-05-15
DHVQFN16_SOT763-1_mk plastic, dual in-line compatible thermal enhanced very thin quad flat package; 16 terminals; 0.5 mm pitch; 3.5 mm x 2.5 mm x 0.85 mm body Marcom graphics 2017-01-28
SOT763-1 plastic, leadless dual in-line compatible thermal enhanced very thin quad flat package; 16 terminals; 0.5 mm pitch; 3.5 mm x 2.5 mm x 1 mm body Package information 2023-05-11
NPIC6C596BQ-Q100_Nexperia_Product_Reliability NPIC6C596BQ-Q100 Nexperia Product Reliability Quality document 2024-06-16

支持

如果您需要設(shè)計(jì)/技術(shù)支持,請(qǐng)告知我們并填寫(xiě) 應(yīng)答表 我們會(huì)盡快回復(fù)您。


Longevity

The Nexperia Longevity Program is aimed to provide our customers information from time to time about the expected time that our products can be ordered. The NLP is reviewed and updated regularly by our Executive Management Team. View our longevity program here.


模型

文件名稱(chēng) 標(biāo)題 類(lèi)型 日期
npic6c596 NPIC6C596 IBIS model IBIS model 2016-05-30
SOT763-1 3D model for products with SOT763-1 package Design support 2019-10-03

How does it work?

The interactive datasheets are based on the Nexperia MOSFET precision electrothermal models. With our interactive datasheets you can simply specify your own conditions interactively. Start by changing the values of the conditions. You can do this by using the sliders in the condition fields. By dragging the sliders you will see how the MOSFET will perform at the new conditions set.

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