可訂購(gòu)部件
| 型號(hào) | 可訂購(gòu)的器件編號(hào) | 訂購(gòu)代碼(12NC) | 封裝 | 從經(jīng)銷商處購(gòu)買 |
|---|---|---|---|---|
| 74LV00BQ | 74LV00BQ,115 | 935285559115 | SOT762-1 | 訂單產(chǎn)品 |
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Click here for more information74LV00BQ
Quad 2-input NAND gate
The 74LV00 is a quad 2-input NAND gate. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess VCC.
Features and benefits
Wide supply voltage range from 1.0 to 5.5 V
CMOS low power dissipation
Latch-up performance exceeds 100 mA per JESD 78 Class II Level B
Optimized for low voltage applications: 1.0 V to 3.6 V
Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V
Typical output ground bounce < 0.8 V at VCC = 3.3 V and Tamb = 25 °C
Typical HIGH-level output voltage (VOH) undershoot: > 2 V at VCC = 3.3 V and Tamb = 25 °C
Complies with JEDEC standards:
- JESD8-7 (1.65 V to 1.95 V)
- JESD8-5 (2.3 V to 2.7 V)
- JESD8C (2.7 V to 3.6 V)
- JESD36 (4.5 V to 5.5 V)
ESD protection:
HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
Multiple package options
Specified from -40 °C to +85 °C and from -40 °C to +125 °C
參數(shù)類型
| 型號(hào) | VCC (V) | Logic switching levels | Output drive capability (mA) | tpd (ns) | fmax (MHz) | Nr of bits | Power dissipation considerations | Tamb (°C) | Rth(j-a) (K/W) | Ψth(j-top) (K/W) | Rth(j-c) (K/W) | Package name |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 74LV00BQ | 1.0?-?5.5 | TTL | ± 12 | 7.0 | 30 | 4 | low | -40~125 | 95 | 11.7 | 62 | DHVQFN14 |
PCB Symbol, Footprint and 3D Model
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封裝
| 型號(hào) | 可訂購(gòu)的器件編號(hào)，（訂購(gòu)碼(12NC)） | 狀態(tài) | 標(biāo)示 | 封裝 | 外形圖 | 回流焊/波峰焊 | 包裝 |
|---|---|---|---|---|---|---|---|
| 74LV00BQ | 74LV00BQ,115 (935285559115) |
Active | LV00 |
DHVQFN14 (SOT762-1) |
SOT762-1 | SOT762-1_115 |
環(huán)境信息
| 型號(hào) | 可訂購(gòu)的器件編號(hào) | 化學(xué)成分 | RoHS | RHF指示符 |
|---|---|---|---|---|
| 74LV00BQ | 74LV00BQ,115 | 74LV00BQ |
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文檔 (9)
| 文件名稱 | 標(biāo)題 | 類型 | 日期 |
|---|---|---|---|
| 74LV00 | Quad 2-input NAND gate | Data sheet | 2024-01-22 |
| SOT762-1 | 3D model for products with SOT762-1 package | Design support | 2019-10-03 |
| lv00 | 74LV00 IBIS model | IBIS model | 2019-01-09 |
| Nexperia_package_poster | Nexperia package poster | Leaflet | 2020-05-15 |
| DHVQFN14_SOT762-1_mk | plastic, dual in-line compatible thermal enhanced very thin quad flat package; no leads; 14 terminals; 0.5 mm pitch; 2.5 mm x 3 mm x 0.85 mm body | Marcom graphics | 2017-01-28 |
| SOT762-1 | plastic, leadless dual in-line compatible thermal enhanced very thin quad flat package; 14 terminals; 0.5 mm pitch; 2.5 x 3 x 1 mm body | Package information | 2023-04-05 |
| SOT762-1_115 | DHVQFN14; Reel pack for SMD, 7"; Q1/T1 product orientation | Packing information | 2020-04-21 |
| 74LV00BQ_Nexperia_Product_Reliability | 74LV00BQ Nexperia Product Reliability | Quality document | 2025-03-20 |
| lv | lv Spice model | SPICE model | 2013-05-07 |
Longevity
The Nexperia Longevity Program is aimed to provide our customers information from time to time about the expected time that our products can be ordered. The NLP is reviewed and updated regularly by our Executive Management Team. View our longevity program here.
PCB Symbol, Footprint and 3D Model
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訂購(gòu)、定價(jià)與供貨
| 型號(hào) | Orderable part number | Ordering code (12NC) | 狀態(tài) | 包裝 | Packing Quantity | 在線購(gòu)買 |
|---|---|---|---|---|---|---|
| 74LV00BQ | 74LV00BQ,115 | 935285559115 | Active | SOT762-1_115 | 3,000 |
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樣品
作為 Nexperia 的客戶，您可以通過我們的銷售機(jī)構(gòu)訂購(gòu)樣品。
如果您沒有 Nexperia 的直接賬戶，我們的全球和地區(qū)分銷商網(wǎng)絡(luò)可為您提供 Nexperia 樣品支持。查看官方經(jīng)銷商列表。
How does it work?
The interactive datasheets are based on the Nexperia MOSFET precision electrothermal models. With our interactive datasheets you can simply specify your own conditions interactively. Start by changing the values of the conditions. You can do this by using the sliders in the condition fields. By dragging the sliders you will see how the MOSFET will perform at the new conditions set.